PLC HMI SCADA automatyka elektrotechnika robotyka

TIA Portal Step 7 schematy elektryczne PLC

RTOS Linux mikrokontrolery STM32 PLC ST lidar

FPGA Verilog HDL SystemVerilog

dokumentacja techniczna SEP TIA Portal Siemens Step 7 HMI

Git, SVN Quartus, Vivado TCL VHDL FPGA (Intel, Xilinx)

Windows

Vehicle HAL (VHAL), CAN / LIN communication

VHDL FPGA LVDS Bash GIT Python SVN GTP

FPGA LVDS GTP VHDL Python Bash Git SVN

angielski

C C# Altium Designer Matlab c++ AWR Microwave Office

C++ ROS

C C++ UL HMI Git Qt MODBUS TCP Linux PLC

PCB EMC RF

Windows

Informatyka elektronika automatyka mechatronika C++ / C#

FPGA / Adaptive SoC design flow PCIe, Ethernet, AMBA / AXI

Git, CI/CD Adaptive SoC verification flows

Vivado / Vitis UVM, class-based verification

C C# C++ Windows

C C# C++ Windows

C C# C++ Windows

C C# C++ Windows

PLC

Bash Linux computer architecture Python

PLC

PLC Scada HMI CSV

Python C++ ROS2 IsaacSim

electronics

FPGA

PCB

VHDL FPGA (Intel, Xilinx) TCL Git, SVN Python ModelSim

C++ Verilog VHDL FPGA

Power design CAN PCB

SOLID

C Python

angielski automatyka wykształcenie techniczne

Zasialnie Gwarantowane (UPS)

C Python

Amazon AWS Terraform Rust IoT Golang C++

C++ C C# FPGA

C++

FPGA VHDL SystemVerilog

C++ Python TCP/IP Linux

OpenGL CUDA C++ C